cystech electronics corp. spec. no. : c351s6r issued date : 2003.05.22 revised date : 2011.02.21 page no. : 1/6 HBC114ES6R cystek product specification dual npn digital transistors HBC114ES6R features ? built-in bias resistors enable the configuration of an inverter circu it without connecting external input resistors (see equi valent circuit). ? the bias resistors consist of thin -film resistors with complete isolat ion to allow negative biasing of the input. they also have the advantage of almost completely eliminating parasitic effects. ? only the on/off conditions need to be set for operation, making device design easy. ? two dtc114e chips in a sot-363 package. ? mounting by sot-323 automatic mounting machines is possible. ? mounting cost and area can be cut in half. ? transistor elements are independent, eliminating interference. ? complements the hba114es6r. ? pb-free package. equivalent circuit outline sot-363r HBC114ES6R r b 1=10k , r b 2=10 k tr1 tr2 r b 1 r be 2 r be 1 r b 2 r be 1=10k , r be 2=10 k
cystech electronics corp. spec. no. : c351s6r issued date : 2003.05.22 revised date : 2011.02.21 page no. : 2/6 HBC114ES6R cystek product specification absolute maximum ratings (each transistor, ta=25 ) parameter symbol limits unit supply voltage v cc 50 v input voltage v in -10~+40 v i o 50 ma output current i o(max.) 100 ma power dissipation pd 200 *1 mw junction temperature tj 150 c storage temperature tstg -55~+150 c note:*1.150mw per element must not be exceeded. characteristics (each transistor, ta=25 ) parameter symbol min. typ. max. unit test conditions v i(off) - - 0.5 v v cc =5v, i o =100 a input voltage v i(on) 3 - - v v o =0.3v, i o =10ma output voltage v o(on) - 0.1 0.3 v i o /i i =10ma/0.5ma input current i i - - 0.88 ma v i =5v output current i o(off) - - 0.5 a v cc =50v, v i =0v dc current gain g i 30 - - - v o =5v, i o =5ma input resistance r 1 7 10 13 k - resistance ratio r 2 /r 1 0.8 1 1.2 - - transition frequency f t - 250 - mhz v ce =10v, i c =5ma, f=100mhz* * transition frequency of the device ordering information device package shipping marking HBC114ES6R sot-363 (pb-free) 3000 pcs / tape & reel 7a
cystech electronics corp. spec. no. : c351s6r issued date : 2003.05.22 revised date : 2011.02.21 page no. : 3/6 HBC114ES6R cystek product specification characteristic curves dc current gain vs output current 10 100 1000 1 10 100 output current ---io(ma) current gain--- hfe vo=5v output voltage vs output current 10 100 1000 1 10 100 output current ---io(ma) output voltage---vo(on)(mv) io/ii=20 input voltage vs output current (on characteristics) 1 10 0.1 1 10 100 output current --- io(ma) input voltage --- vi(on)(v) vo=0.3v output current vs input voltage (off characteristics) 0.1 1 10 100 0.1 1 10 input voltage --- vi(off)(v) output current --- io(ma) vcc=5v power derating curves 0 50 100 150 200 250 0 50 100 150 200 ambient temperature---ta() power dissipation---(mw) dual s ingle
cystech electronics corp. spec. no. : c351s6r issued date : 2003.05.22 revised date : 2011.02.21 page no. : 4/6 HBC114ES6R cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c351s6r issued date : 2003.05.22 revised date : 2011.02.21 page no. : 5/6 HBC114ES6R cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c351s6r issued date : 2003.05.22 revised date : 2011.02.21 page no. : 6/6 HBC114ES6R cystek product specification sot-363 dimension millimeters inches millimeters marking: date code: year + month year : 6 2006, 7 2007,?, etc month : 1 jan feb, ?, 9 sep, a oct, b nov, c dec inches dim min. max. min. max. dim min. max. min. max. a 0.900 1.100 0.035 0.043 e1 2.150 2.450 0.085 0.096 a1 0.000 0.100 0.000 0.004 e 0.650 typ 0.026 typ a2 0.900 1.000 0.035 0.039 e1 1.200 1.400 0.047 0.055 b 0.150 0.350 0.006 0.014 l 0.525 ref 0.021 ref c 0.080 0.150 0.003 0.006 l1 0.260 0.460 0.010 0.018 d 2.000 2.200 0.079 0.087 0 8 0 8 e 1.150 1.350 0.045 0.053 notes : 1 .controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . 6-lead sot-363r plastic surface mounted package cystek package code: s6r style: pin 1. emitter1 (e1) pin 2. base1 (b1) pin 3. collector2 (c2) pin 4. emitter2 (e2) pin 5. base2 (b2) ctor1 (c1) pin 6. colle device code 7 a 2
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